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More detailed print on ahci error

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This commit is contained in:
Jeremy Soller 2016-09-30 12:06:50 -06:00
parent 72fe60b6a8
commit 478bc20b85
1 changed files with 11 additions and 0 deletions
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11
drivers/ahcid/src/ahci/hba.rs
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@ -78,6 +78,8 @@ impl HbaPort {
self.clb.write(clb.physical() as u64); self.clb.write(clb.physical() as u64);
self.fb.write(fb.physical() as u64); self.fb.write(fb.physical() as u64);
let is = self.is.read();
self.is.write(is);
for i in 0..32 { for i in 0..32 {
let cmdheader = &mut clb[i]; let cmdheader = &mut clb[i];
@ -272,11 +274,13 @@ impl HbaPort {
while self.ci.readf(1 << slot) { while self.ci.readf(1 << slot) {
if self.is.readf(HBA_PORT_IS_TFES) { if self.is.readf(HBA_PORT_IS_TFES) {
println!("IS_TFES set in CI loop TFS {:X} SERR {:X}", self.tfd.read(), self.serr.read());
return Err(Error::new(EIO)); return Err(Error::new(EIO));
} }
} }
if self.is.readf(HBA_PORT_IS_TFES) { if self.is.readf(HBA_PORT_IS_TFES) {
println!("IS_TFES set after CI loop TFS {:X} SERR {:X}", self.tfd.read(), self.serr.read());
return Err(Error::new(EIO)); return Err(Error::new(EIO));
} }
@ -306,6 +310,13 @@ pub struct HbaMem {
pub ports: [HbaPort; 32], // 0x100 - 0x10FF, Port control registers pub ports: [HbaPort; 32], // 0x100 - 0x10FF, Port control registers
} }
impl HbaMem {
pub fn reset(&mut self) {
self.ghc.writef(1, true);
while self.ghc.readf(1) {}
}
}
#[repr(packed)] #[repr(packed)]
pub struct HbaPrdtEntry { pub struct HbaPrdtEntry {
dba: Mmio<u64>, // Data base address dba: Mmio<u64>, // Data base address