cr3 in context

This commit is contained in:
Jeremy Soller 2016-09-12 12:21:34 -06:00
parent 85fef883d6
commit 1298e38ed8
3 changed files with 25 additions and 11 deletions

View file

@ -8,6 +8,8 @@ pub static CONTEXT_SWITCH_LOCK: AtomicBool = ATOMIC_BOOL_INIT;
#[derive(Debug)] #[derive(Debug)]
pub struct Context { pub struct Context {
/// Page table pointer
cr3: usize,
/// RFLAGS register /// RFLAGS register
rflags: usize, rflags: usize,
/// RBX register /// RBX register
@ -23,14 +25,13 @@ pub struct Context {
/// Base pointer /// Base pointer
rbp: usize, rbp: usize,
/// Stack pointer /// Stack pointer
rsp: usize, rsp: usize
/// Page table pointer
cr3: usize
} }
impl Context { impl Context {
pub fn new() -> Context { pub fn new() -> Context {
Context { Context {
cr3: 0,
rflags: 0, rflags: 0,
rbx: 0, rbx: 0,
r12: 0, r12: 0,
@ -38,11 +39,14 @@ impl Context {
r14: 0, r14: 0,
r15: 0, r15: 0,
rbp: 0, rbp: 0,
rsp: 0, rsp: 0
cr3: 0
} }
} }
pub fn set_page_table(&mut self, address: usize) {
self.cr3 = address;
}
pub fn set_stack(&mut self, address: usize) { pub fn set_stack(&mut self, address: usize) {
self.rsp = address; self.rsp = address;
} }
@ -61,6 +65,11 @@ impl Context {
} }
*/ */
asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
if next.cr3 != self.cr3 {
asm!("mov cr3, $0" : : "r"(next.cr3) : "memory" : "intel", "volatile");
}
asm!("pushfq ; pop $0" : "=r"(self.rflags) : : "memory" : "intel", "volatile"); asm!("pushfq ; pop $0" : "=r"(self.rflags) : : "memory" : "intel", "volatile");
asm!("push $0 ; popfq" : : "r"(next.rflags) : "memory" : "intel", "volatile"); asm!("push $0 ; popfq" : : "r"(next.rflags) : "memory" : "intel", "volatile");
@ -85,11 +94,6 @@ impl Context {
asm!("mov $0, rbp" : "=r"(self.rbp) : : "memory" : "intel", "volatile"); asm!("mov $0, rbp" : "=r"(self.rbp) : : "memory" : "intel", "volatile");
asm!("mov rbp, $0" : : "r"(next.rbp) : "memory" : "intel", "volatile"); asm!("mov rbp, $0" : : "r"(next.rbp) : "memory" : "intel", "volatile");
/* TODO
asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
asm!("mov cr3, $0" : : "r"(self.cr3) : "memory" : "intel", "volatile");
*/
// Unset global lock, set inside of kernel // Unset global lock, set inside of kernel
CONTEXT_SWITCH_LOCK.store(false, Ordering::SeqCst); CONTEXT_SWITCH_LOCK.store(false, Ordering::SeqCst);
} }

View file

@ -224,7 +224,7 @@ impl ActivePageTable {
use x86::controlregs; use x86::controlregs;
{ {
let backup = Frame::containing_address(PhysicalAddress::new(unsafe { controlregs::cr3() } as usize)); let backup = Frame::containing_address(PhysicalAddress::new(unsafe { controlregs::cr3() as usize }));
// map temporary_page to current p4 table // map temporary_page to current p4 table
let p4_table = temporary_page.map_table_frame(backup.clone(), PRESENT | WRITABLE | NO_EXECUTE, self); let p4_table = temporary_page.map_table_frame(backup.clone(), PRESENT | WRITABLE | NO_EXECUTE, self);
@ -243,6 +243,11 @@ impl ActivePageTable {
temporary_page.unmap(self); temporary_page.unmap(self);
} }
pub unsafe fn address(&self) -> usize {
use x86::controlregs;
controlregs::cr3() as usize
}
} }
pub struct InactivePageTable { pub struct InactivePageTable {
@ -262,6 +267,10 @@ impl InactivePageTable {
InactivePageTable { p4_frame: frame } InactivePageTable { p4_frame: frame }
} }
pub unsafe fn address(&self) -> usize {
self.p4_frame.start_address().get()
}
} }
/// A physical address. /// A physical address.

View file

@ -81,6 +81,7 @@ impl ContextList {
let func_ptr = stack.as_mut_ptr().offset(offset as isize); let func_ptr = stack.as_mut_ptr().offset(offset as isize);
*(func_ptr as *mut usize) = func as usize; *(func_ptr as *mut usize) = func as usize;
} }
context.arch.set_page_table(unsafe { arch::paging::ActivePageTable::new().address() });
context.arch.set_stack(stack.as_ptr() as usize + offset); context.arch.set_stack(stack.as_ptr() as usize + offset);
context.kstack = Some(stack); context.kstack = Some(stack);
} }