From 1298e38ed8474723c288c5dde66bac69f55c0614 Mon Sep 17 00:00:00 2001
From: Jeremy Soller <jackpot51@gmail.com>
Date: Mon, 12 Sep 2016 12:21:34 -0600
Subject: [PATCH] cr3 in context

---
 arch/x86_64/src/context.rs    | 24 ++++++++++++++----------
 arch/x86_64/src/paging/mod.rs | 11 ++++++++++-
 kernel/context/mod.rs         |  1 +
 3 files changed, 25 insertions(+), 11 deletions(-)

diff --git a/arch/x86_64/src/context.rs b/arch/x86_64/src/context.rs
index ef95e05..4c9ba54 100644
--- a/arch/x86_64/src/context.rs
+++ b/arch/x86_64/src/context.rs
@@ -8,6 +8,8 @@ pub static CONTEXT_SWITCH_LOCK: AtomicBool = ATOMIC_BOOL_INIT;
 
 #[derive(Debug)]
 pub struct Context {
+    /// Page table pointer
+    cr3: usize,
     /// RFLAGS register
     rflags: usize,
     /// RBX register
@@ -23,14 +25,13 @@ pub struct Context {
     /// Base pointer
     rbp: usize,
     /// Stack pointer
-    rsp: usize,
-    /// Page table pointer
-    cr3: usize
+    rsp: usize
 }
 
 impl Context {
     pub fn new() -> Context {
         Context {
+            cr3: 0,
             rflags: 0,
             rbx: 0,
             r12: 0,
@@ -38,11 +39,14 @@ impl Context {
             r14: 0,
             r15: 0,
             rbp: 0,
-            rsp: 0,
-            cr3: 0
+            rsp: 0
         }
     }
 
+    pub fn set_page_table(&mut self, address: usize) {
+        self.cr3 = address;
+    }
+
     pub fn set_stack(&mut self, address: usize) {
         self.rsp = address;
     }
@@ -61,6 +65,11 @@ impl Context {
         }
 */
 
+        asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
+        if next.cr3 != self.cr3 {
+            asm!("mov cr3, $0" : : "r"(next.cr3) : "memory" : "intel", "volatile");
+        }
+
         asm!("pushfq ; pop $0" : "=r"(self.rflags) : : "memory" : "intel", "volatile");
         asm!("push $0 ; popfq" : : "r"(next.rflags) : "memory" : "intel", "volatile");
 
@@ -85,11 +94,6 @@ impl Context {
         asm!("mov $0, rbp" : "=r"(self.rbp) : : "memory" : "intel", "volatile");
         asm!("mov rbp, $0" : : "r"(next.rbp) : "memory" : "intel", "volatile");
 
-        /* TODO
-        asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
-        asm!("mov cr3, $0" : : "r"(self.cr3) : "memory" : "intel", "volatile");
-        */
-
         // Unset global lock, set inside of kernel
         CONTEXT_SWITCH_LOCK.store(false, Ordering::SeqCst);
     }
diff --git a/arch/x86_64/src/paging/mod.rs b/arch/x86_64/src/paging/mod.rs
index 8dc9975..03bde70 100644
--- a/arch/x86_64/src/paging/mod.rs
+++ b/arch/x86_64/src/paging/mod.rs
@@ -224,7 +224,7 @@ impl ActivePageTable {
         use x86::controlregs;
 
         {
-            let backup = Frame::containing_address(PhysicalAddress::new(unsafe { controlregs::cr3() } as usize));
+            let backup = Frame::containing_address(PhysicalAddress::new(unsafe { controlregs::cr3() as usize }));
 
             // map temporary_page to current p4 table
             let p4_table = temporary_page.map_table_frame(backup.clone(), PRESENT | WRITABLE | NO_EXECUTE, self);
@@ -243,6 +243,11 @@ impl ActivePageTable {
 
         temporary_page.unmap(self);
     }
+
+    pub unsafe fn address(&self) -> usize {
+        use x86::controlregs;
+        controlregs::cr3() as usize
+    }
 }
 
 pub struct InactivePageTable {
@@ -262,6 +267,10 @@ impl InactivePageTable {
 
         InactivePageTable { p4_frame: frame }
     }
+
+    pub unsafe fn address(&self) -> usize {
+        self.p4_frame.start_address().get()
+    }
 }
 
 /// A physical address.
diff --git a/kernel/context/mod.rs b/kernel/context/mod.rs
index 1e96a01..a31d7b4 100644
--- a/kernel/context/mod.rs
+++ b/kernel/context/mod.rs
@@ -81,6 +81,7 @@ impl ContextList {
                 let func_ptr = stack.as_mut_ptr().offset(offset as isize);
                 *(func_ptr as *mut usize) = func as usize;
             }
+            context.arch.set_page_table(unsafe { arch::paging::ActivePageTable::new().address() });
             context.arch.set_stack(stack.as_ptr() as usize + offset);
             context.kstack = Some(stack);
         }