78 lines
2.1 KiB
Rust
78 lines
2.1 KiB
Rust
use core::intrinsics::{volatile_load, volatile_store};
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use x86::cpuid::CpuId;
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use x86::msr::*;
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use memory::Frame;
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use paging::{entry, ActivePageTable, PhysicalAddress};
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/// Local APIC
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pub struct LocalApic {
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pub address: u32,
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pub x2: bool
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}
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impl LocalApic {
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pub fn new(active_table: &mut ActivePageTable) -> Self {
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let mut apic = LocalApic {
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address: (unsafe { rdmsr(IA32_APIC_BASE) as u32 } & 0xFFFF0000),
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x2: false
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};
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if CpuId::new().get_feature_info().unwrap().has_x2apic() {
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unsafe { wrmsr(IA32_APIC_BASE, rdmsr(IA32_APIC_BASE) | 1 << 10) };
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apic.x2 = true;
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} else {
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active_table.identity_map(Frame::containing_address(PhysicalAddress::new(apic.address as usize)), entry::PRESENT | entry::WRITABLE | entry::NO_EXECUTE);
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}
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apic
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}
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unsafe fn read(&self, reg: u32) -> u32 {
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volatile_load((self.address + reg) as *const u32)
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}
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unsafe fn write(&self, reg: u32, value: u32) {
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volatile_store((self.address + reg) as *mut u32, value);
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}
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pub fn id(&self) -> u32 {
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if self.x2 {
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unsafe { rdmsr(IA32_X2APIC_APICID) as u32 }
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} else {
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unsafe { self.read(0x20) }
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}
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}
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pub fn version(&self) -> u32 {
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if self.x2 {
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unsafe { rdmsr(IA32_X2APIC_VERSION) as u32 }
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} else {
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unsafe { self.read(0x30) }
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}
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}
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pub fn icr(&self) -> u64 {
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if self.x2 {
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unsafe { rdmsr(IA32_X2APIC_ICR) }
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} else {
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unsafe {
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(self.read(0x310) as u64) << 32 | self.read(0x300) as u64
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}
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}
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}
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pub fn set_icr(&mut self, value: u64) {
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if self.x2 {
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unsafe { wrmsr(IA32_X2APIC_ICR, value); }
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} else {
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unsafe {
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while self.read(0x300) & 1 << 12 == 1 << 12 {}
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self.write(0x310, (value >> 32) as u32);
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self.write(0x300, value as u32);
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while self.read(0x300) & 1 << 12 == 1 << 12 {}
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}
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}
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}
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}
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