Simplify bootloader GDT
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6d675fc43a
commit
6560cc653b
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@ -1,6 +1,7 @@
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trampoline:
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trampoline:
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.ready: dq 0
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.ready: dq 0
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.cpu_id: dq 0
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.cpu_id: dq 0
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.page_table: dq 0
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.stack_start: dq 0
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.stack_start: dq 0
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.stack_end: dq 0
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.stack_end: dq 0
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.code: dq 0
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.code: dq 0
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@ -133,13 +134,14 @@ long_mode_ap:
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mov ss, rax
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mov ss, rax
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mov rdi, [trampoline.cpu_id]
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mov rdi, [trampoline.cpu_id]
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mov rsi, [trampoline.stack_start]
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mov rsi, [trampoline.page_table]
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mov rdx, [trampoline.stack_end]
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mov rdx, [trampoline.stack_start]
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mov rcx, [trampoline.stack_end]
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lea rsp, [rdx - 256]
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lea rsp, [rcx - 256]
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mov qword [trampoline.ready], 1
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mov rax, [trampoline.code]
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mov rax, [trampoline.code]
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mov qword [trampoline.ready], 1
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jmp rax
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jmp rax
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gdtr:
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gdtr:
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@ -171,74 +173,4 @@ istruc GDTEntry
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at GDTEntry.baseh, db 0
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at GDTEntry.baseh, db 0
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iend
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iend
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.user_code equ $ - gdt
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istruc GDTEntry
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at GDTEntry.limitl, dw 0
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at GDTEntry.basel, dw 0
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at GDTEntry.basem, db 0
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at GDTEntry.attribute, db attrib.present | attrib.ring3 | attrib.user | attrib.code
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at GDTEntry.flags__limith, db flags.long_mode
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at GDTEntry.baseh, db 0
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iend
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.user_data equ $ - gdt
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istruc GDTEntry
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at GDTEntry.limitl, dw 0
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at GDTEntry.basel, dw 0
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at GDTEntry.basem, db 0
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; AMD System Programming Manual states that the writeable bit is ignored in long mode, but ss can not be set to this descriptor without it
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at GDTEntry.attribute, db attrib.present | attrib.ring3 | attrib.user | attrib.writable
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at GDTEntry.flags__limith, db 0
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at GDTEntry.baseh, db 0
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iend
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.user_tls equ $ - gdt
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istruc GDTEntry
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at GDTEntry.limitl, dw 0
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at GDTEntry.basel, dw 0
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at GDTEntry.basem, db 0
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; AMD System Programming Manual states that the writeable bit is ignored in long mode, but ss can not be set to this descriptor without it
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at GDTEntry.attribute, db attrib.present | attrib.ring3 | attrib.user | attrib.writable
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at GDTEntry.flags__limith, db 0
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at GDTEntry.baseh, db 0
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iend
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.tss equ $ - gdt
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istruc GDTEntry
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at GDTEntry.limitl, dw (tss.end - tss) & 0xFFFF
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at GDTEntry.basel, dw (tss-$$+0x7C00) & 0xFFFF
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at GDTEntry.basem, db ((tss-$$+0x7C00) >> 16) & 0xFF
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at GDTEntry.attribute, db attrib.present | attrib.ring3 | attrib.tssAvailabe64
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at GDTEntry.flags__limith, db ((tss.end - tss) >> 16) & 0xF
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at GDTEntry.baseh, db ((tss-$$+0x7C00) >> 24) & 0xFF
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iend
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dq 0 ;tss descriptors are extended to 16 Bytes
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.end equ $ - gdt
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.end equ $ - gdt
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struc TSS
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.reserved1 resd 1 ;The previous TSS - if we used hardware task switching this would form a linked list.
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.rsp0 resq 1 ;The stack pointer to load when we change to kernel mode.
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.rsp1 resq 1 ;everything below here is unused now..
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.rsp2 resq 1
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.reserved2 resd 1
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.reserved3 resd 1
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.ist1 resq 1
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.ist2 resq 1
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.ist3 resq 1
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.ist4 resq 1
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.ist5 resq 1
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.ist6 resq 1
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.ist7 resq 1
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.reserved4 resd 1
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.reserved5 resd 1
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.reserved6 resw 1
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.iomap_base resw 1
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endstruc
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tss:
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istruc TSS
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at TSS.rsp0, dd 0x800000 - 128
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at TSS.iomap_base, dw 0xFFFF
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iend
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.end:
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