Enable bus mastering
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2 changed files with 17 additions and 0 deletions
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@ -34,6 +34,17 @@ impl Pci {
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: "={eax}"(value) : "{eax}"(address) : "dx" : "intel", "volatile");
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value
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}
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub unsafe fn write(&self, bus: u8, dev: u8, func: u8, offset: u8, value: u32) {
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let address = 0x80000000 | ((bus as u32) << 16) | ((dev as u32) << 11) | ((func as u32) << 8) | ((offset as u32) & 0xFC);
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asm!("mov dx, 0xCF8
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out dx, eax"
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: : "{eax}"(address) : "dx" : "intel", "volatile");
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asm!("mov dx, 0xCFC
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out dx, eax"
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: : "{eax}"(value) : "dx" : "intel", "volatile");
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}
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}
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pub struct PciIter<'pci> {
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