Debug all driver activity to display:1, use format to avoid line splitting
This commit is contained in:
parent
d71081110e
commit
418149bb07
6
Makefile
6
Makefile
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@ -246,7 +246,9 @@ $(BUILD)/initfs.rs: \
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initfs/bin/init \
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initfs/bin/init \
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initfs/bin/ahcid \
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initfs/bin/ahcid \
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initfs/bin/pcid \
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initfs/bin/pcid \
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initfs/bin/ps2d \
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initfs/bin/redoxfs \
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initfs/bin/redoxfs \
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initfs/bin/vesad \
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initfs/etc/**
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initfs/etc/**
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echo 'use collections::BTreeMap;' > $@
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echo 'use collections::BTreeMap;' > $@
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echo 'pub fn gen() -> BTreeMap<&'"'"'static [u8], (&'"'"'static [u8], bool)> {' >> $@
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echo 'pub fn gen() -> BTreeMap<&'"'"'static [u8], (&'"'"'static [u8], bool)> {' >> $@
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@ -321,9 +323,7 @@ filesystem/bin/%: schemes/%/Cargo.toml schemes/%/src/** $(BUILD)/libstd.rlib
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drivers: \
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drivers: \
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filesystem/bin/e1000d \
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filesystem/bin/e1000d \
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filesystem/bin/ps2d \
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filesystem/bin/rtl8168d
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filesystem/bin/rtl8168d \
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filesystem/bin/vesad
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coreutils: \
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coreutils: \
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filesystem/bin/basename \
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filesystem/bin/basename \
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@ -191,8 +191,8 @@ impl HbaPort {
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48
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48
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};
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};
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println!(" + Serial: {} Firmware: {} Model: {} {}-bit LBA Size: {} MB",
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print!("{}", format!(" + Serial: {} Firmware: {} Model: {} {}-bit LBA Size: {} MB\n",
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serial.trim(), firmware.trim(), model.trim(), lba_bits, sectors / 2048);
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serial.trim(), firmware.trim(), model.trim(), lba_bits, sectors / 2048));
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Some(sectors * 512)
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Some(sectors * 512)
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} else {
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} else {
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@ -230,7 +230,7 @@ impl HbaPort {
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}
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}
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pub fn ata_dma(&mut self, block: u64, sectors: usize, write: bool, clb: &mut Dma<[HbaCmdHeader; 32]>, ctbas: &mut [Dma<HbaCmdTable>; 32], buf: &mut Dma<[u8; 256 * 512]>) -> Result<usize> {
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pub fn ata_dma(&mut self, block: u64, sectors: usize, write: bool, clb: &mut Dma<[HbaCmdHeader; 32]>, ctbas: &mut [Dma<HbaCmdTable>; 32], buf: &mut Dma<[u8; 256 * 512]>) -> Result<usize> {
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//println!("AHCI {:X} DMA BLOCK: {:X} SECTORS: {} WRITE: {}", (self as *mut HbaPort) as usize, block, sectors, write);
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//print!("{}", format!("AHCI {:X} DMA BLOCK: {:X} SECTORS: {} WRITE: {}\n", (self as *mut HbaPort) as usize, block, sectors, write));
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assert!(sectors > 0 && sectors < 256);
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assert!(sectors > 0 && sectors < 256);
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@ -286,20 +286,20 @@ impl HbaPort {
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while self.ci.readf(1 << slot) {
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while self.ci.readf(1 << slot) {
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if self.is.readf(HBA_PORT_IS_TFES) {
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if self.is.readf(HBA_PORT_IS_TFES) {
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println!("IS_TFES set in CI loop TFS {:X} SERR {:X}", self.tfd.read(), self.serr.read());
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print!("{}", format!("IS_TFES set in CI loop TFS {:X} SERR {:X}\n", self.tfd.read(), self.serr.read()));
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return Err(Error::new(EIO));
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return Err(Error::new(EIO));
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}
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}
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pause();
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pause();
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}
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}
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if self.is.readf(HBA_PORT_IS_TFES) {
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if self.is.readf(HBA_PORT_IS_TFES) {
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println!("IS_TFES set after CI loop TFS {:X} SERR {:X}", self.tfd.read(), self.serr.read());
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print!("{}", format!("IS_TFES set after CI loop TFS {:X} SERR {:X}\n", self.tfd.read(), self.serr.read()));
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return Err(Error::new(EIO));
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return Err(Error::new(EIO));
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}
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}
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Ok(sectors * 512)
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Ok(sectors * 512)
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} else {
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} else {
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println!("No Command Slots");
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print!("No Command Slots\n");
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Err(Error::new(EIO))
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Err(Error::new(EIO))
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}
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}
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}
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}
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@ -8,21 +8,19 @@ pub mod fis;
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pub mod hba;
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pub mod hba;
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pub fn disks(base: usize, irq: u8) -> Vec<Disk> {
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pub fn disks(base: usize, irq: u8) -> Vec<Disk> {
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println!(" + AHCI on: {:X} IRQ: {}", base as usize, irq);
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let pi = unsafe { &mut *(base as *mut HbaMem) }.pi.read();
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let pi = unsafe { &mut *(base as *mut HbaMem) }.pi.read();
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let ret: Vec<Disk> = (0..32)
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let ret: Vec<Disk> = (0..32)
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.filter(|&i| pi & 1 << i as i32 == 1 << i as i32)
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.filter(|&i| pi & 1 << i as i32 == 1 << i as i32)
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.filter_map(|i| {
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.filter_map(|i| {
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let port = &mut unsafe { &mut *(base as *mut HbaMem) }.ports[i];
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let port = &mut unsafe { &mut *(base as *mut HbaMem) }.ports[i];
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let port_type = port.probe();
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let port_type = port.probe();
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println!("{}: {:?}", i, port_type);
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print!("{}", format!("{}: {:?}\n", i, port_type));
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match port_type {
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match port_type {
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HbaPortType::SATA => {
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HbaPortType::SATA => {
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match Disk::new(i, port) {
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match Disk::new(i, port) {
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Ok(disk) => Some(disk),
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Ok(disk) => Some(disk),
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Err(err) => {
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Err(err) => {
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println!("{}: {}", i, err);
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print!("{}", format!("{}: {}\n", i, err));
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None
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None
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}
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}
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}
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}
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@ -27,6 +27,8 @@ fn main() {
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let irq_str = args.next().expect("ahcid: no irq provided");
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let irq_str = args.next().expect("ahcid: no irq provided");
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let irq = irq_str.parse::<u8>().expect("ahcid: failed to parse irq");
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let irq = irq_str.parse::<u8>().expect("ahcid: failed to parse irq");
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print!("{}", format!(" + AHCI on: {:X} IRQ: {}\n", bar, irq));
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thread::spawn(move || {
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thread::spawn(move || {
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unsafe {
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unsafe {
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syscall::iopl(3).expect("ahcid: failed to get I/O permission");
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syscall::iopl(3).expect("ahcid: failed to get I/O permission");
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@ -93,7 +93,6 @@ const TD_DD: u8 = 1;
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pub struct Intel8254x {
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pub struct Intel8254x {
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base: usize,
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base: usize,
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irq: u8,
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receive_buffer: [Dma<[u8; 16384]>; 16],
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receive_buffer: [Dma<[u8; 16384]>; 16],
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receive_ring: Dma<[Rd; 16]>,
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receive_ring: Dma<[Rd; 16]>,
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transmit_buffer: [Dma<[u8; 16384]>; 16],
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transmit_buffer: [Dma<[u8; 16384]>; 16],
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@ -201,10 +200,9 @@ impl Scheme for Intel8254x {
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}
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}
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impl Intel8254x {
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impl Intel8254x {
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pub unsafe fn new(base: usize, irq: u8) -> Result<Self> {
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pub unsafe fn new(base: usize) -> Result<Self> {
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let mut module = Intel8254x {
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let mut module = Intel8254x {
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base: base,
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base: base,
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irq: irq,
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receive_buffer: [Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
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receive_buffer: [Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
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Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
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Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
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Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
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Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
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@ -245,8 +243,6 @@ impl Intel8254x {
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}
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}
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pub unsafe fn init(&mut self) {
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pub unsafe fn init(&mut self) {
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println!(" + Intel 8254x on: {:X}, IRQ: {}", self.base, self.irq);
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// Enable auto negotiate, link, clear reset, do not Invert Loss-Of Signal
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// Enable auto negotiate, link, clear reset, do not Invert Loss-Of Signal
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self.flag(CTRL, CTRL_ASDE | CTRL_SLU, true);
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self.flag(CTRL, CTRL_ASDE | CTRL_SLU, true);
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self.flag(CTRL, CTRL_LRST, false);
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self.flag(CTRL, CTRL_LRST, false);
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@ -272,7 +268,7 @@ impl Intel8254x {
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(mac_low >> 24) as u8,
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(mac_low >> 24) as u8,
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mac_high as u8,
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mac_high as u8,
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(mac_high >> 8) as u8];
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(mac_high >> 8) as u8];
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println!(" - MAC: {:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
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print!("{}", format!(" - MAC: {:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}\n", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]));
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let _ = setcfg("mac", &format!("{:>02X}.{:>02X}.{:>02X}.{:>02X}.{:>02X}.{:>02X}", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]));
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let _ = setcfg("mac", &format!("{:>02X}.{:>02X}.{:>02X}.{:>02X}.{:>02X}.{:>02X}", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]));
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//
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//
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@ -27,6 +27,8 @@ fn main() {
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let irq_str = args.next().expect("e1000d: no irq provided");
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let irq_str = args.next().expect("e1000d: no irq provided");
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let irq = irq_str.parse::<u8>().expect("e1000d: failed to parse irq");
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let irq = irq_str.parse::<u8>().expect("e1000d: failed to parse irq");
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print!("{}", format!(" + E1000 on: {:X}, IRQ: {}\n", bar, irq));
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thread::spawn(move || {
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thread::spawn(move || {
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unsafe {
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unsafe {
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syscall::iopl(3).expect("e1000d: failed to get I/O permission");
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syscall::iopl(3).expect("e1000d: failed to get I/O permission");
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@ -38,7 +40,7 @@ fn main() {
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let address = unsafe { syscall::physmap(bar, 128*1024, MAP_WRITE).expect("e1000d: failed to map address") };
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let address = unsafe { syscall::physmap(bar, 128*1024, MAP_WRITE).expect("e1000d: failed to map address") };
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{
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{
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let device = Arc::new(unsafe { device::Intel8254x::new(address, irq).expect("e1000d: failed to allocate device") });
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let device = Arc::new(unsafe { device::Intel8254x::new(address).expect("e1000d: failed to allocate device") });
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let mut event_queue = EventQueue::<usize>::new().expect("e1000d: failed to create event queue");
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let mut event_queue = EventQueue::<usize>::new().expect("e1000d: failed to create event queue");
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@ -31,43 +31,44 @@ fn main() {
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unsafe { iopl(3).unwrap() };
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unsafe { iopl(3).unwrap() };
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println!("PCI BS/DV/FN VEND:DEVI CL.SC.IN.RV");
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print!("PCI BS/DV/FN VEND:DEVI CL.SC.IN.RV\n");
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let pci = Pci::new();
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let pci = Pci::new();
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for bus in pci.buses() {
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for bus in pci.buses() {
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for dev in bus.devs() {
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for dev in bus.devs() {
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for func in dev.funcs() {
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for func in dev.funcs() {
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if let Some(header) = func.header() {
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if let Some(header) = func.header() {
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print!("PCI {:>02X}/{:>02X}/{:>02X} {:>04X}:{:>04X} {:>02X}.{:>02X}.{:>02X}.{:>02X}",
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let pci_class = PciClass::from(header.class);
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let mut string = format!("PCI {:>02X}/{:>02X}/{:>02X} {:>04X}:{:>04X} {:>02X}.{:>02X}.{:>02X}.{:>02X} {:?}",
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bus.num, dev.num, func.num,
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bus.num, dev.num, func.num,
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header.vendor_id, header.device_id,
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header.vendor_id, header.device_id,
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header.class, header.subclass, header.interface, header.revision);
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header.class, header.subclass, header.interface, header.revision,
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pci_class);
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let pci_class = PciClass::from(header.class);
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print!(" {:?}", pci_class);
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match pci_class {
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match pci_class {
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PciClass::Storage => match header.subclass {
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PciClass::Storage => match header.subclass {
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0x01 => {
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0x01 => {
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print!(" IDE");
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string.push_str(" IDE");
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},
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},
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0x06 => {
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0x06 => {
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print!(" SATA");
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string.push_str(" SATA");
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},
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},
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_ => ()
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_ => ()
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},
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},
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PciClass::SerialBus => match header.subclass {
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PciClass::SerialBus => match header.subclass {
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0x03 => match header.interface {
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0x03 => match header.interface {
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0x00 => {
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0x00 => {
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print!(" UHCI");
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string.push_str(" UHCI");
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},
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},
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0x10 => {
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0x10 => {
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print!(" OHCI");
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string.push_str(" OHCI");
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},
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},
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0x20 => {
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0x20 => {
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print!(" EHCI");
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string.push_str(" EHCI");
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},
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},
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0x30 => {
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0x30 => {
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print!(" XHCI");
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string.push_str(" XHCI");
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},
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},
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_ => ()
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_ => ()
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},
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},
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@ -79,12 +80,14 @@ fn main() {
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for i in 0..header.bars.len() {
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for i in 0..header.bars.len() {
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match PciBar::from(header.bars[i]) {
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match PciBar::from(header.bars[i]) {
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PciBar::None => (),
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PciBar::None => (),
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PciBar::Memory(address) => print!(" {}={:>08X}", i, address),
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PciBar::Memory(address) => string.push_str(&format!(" {}={:>08X}", i, address)),
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PciBar::Port(address) => print!(" {}={:>04X}", i, address)
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PciBar::Port(address) => string.push_str(&format!(" {}={:>04X}", i, address))
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}
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}
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}
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}
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print!("\n");
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string.push('\n');
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print!("{}", string);
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for driver in config.drivers.iter() {
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for driver in config.drivers.iter() {
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if let Some(class) = driver.class {
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if let Some(class) = driver.class {
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@ -66,7 +66,6 @@ struct Td {
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pub struct Rtl8168 {
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pub struct Rtl8168 {
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regs: &'static mut Regs,
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regs: &'static mut Regs,
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irq: u8,
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receive_buffer: [Dma<[u8; 0x1FF8]>; 16],
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receive_buffer: [Dma<[u8; 0x1FF8]>; 16],
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receive_ring: Dma<[Rd; 16]>,
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receive_ring: Dma<[Rd; 16]>,
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transmit_buffer: [Dma<[u8; 7552]>; 16],
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transmit_buffer: [Dma<[u8; 7552]>; 16],
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@ -89,13 +88,10 @@ impl SchemeMut for Rtl8168 {
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}
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}
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fn read(&mut self, _id: usize, buf: &mut [u8]) -> Result<usize> {
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fn read(&mut self, _id: usize, buf: &mut [u8]) -> Result<usize> {
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println!("Try Receive {}", buf.len());
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for (rd_i, rd) in self.receive_ring.iter_mut().enumerate() {
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for (rd_i, rd) in self.receive_ring.iter_mut().enumerate() {
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if ! rd.ctrl.readf(OWN) {
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if ! rd.ctrl.readf(OWN) {
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let rd_len = rd.ctrl.read() & 0x3FFF;
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let rd_len = rd.ctrl.read() & 0x3FFF;
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println!("Receive {}: {}", rd_i, rd_len);
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let data = &self.receive_buffer[rd_i as usize];
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let data = &self.receive_buffer[rd_i as usize];
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let mut i = 0;
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let mut i = 0;
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@ -115,11 +111,9 @@ impl SchemeMut for Rtl8168 {
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}
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}
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fn write(&mut self, _id: usize, buf: &[u8]) -> Result<usize> {
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fn write(&mut self, _id: usize, buf: &[u8]) -> Result<usize> {
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println!("Try Transmit {}", buf.len());
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loop {
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loop {
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for (td_i, td) in self.transmit_ring.iter_mut().enumerate() {
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for (td_i, td) in self.transmit_ring.iter_mut().enumerate() {
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if ! td.ctrl.readf(OWN) {
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if ! td.ctrl.readf(OWN) {
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println!("Transmit {}: Setup {}", td_i, buf.len());
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let mut data = &mut self.transmit_buffer[td_i as usize];
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let mut data = &mut self.transmit_buffer[td_i as usize];
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@ -129,21 +123,15 @@ impl SchemeMut for Rtl8168 {
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i += 1;
|
i += 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
println!("Transmit {}: Before: Control {:X}: Buffer {:X} TPPoll: {:X} ISR: {:X}", td_i, td.ctrl.read(), td.buffer.read(), self.regs.tppoll.read(), self.regs.isr.read());
|
|
||||||
|
|
||||||
let eor = td.ctrl.read() & EOR;
|
let eor = td.ctrl.read() & EOR;
|
||||||
td.ctrl.write(OWN | eor | FS | LS | i as u32);
|
td.ctrl.write(OWN | eor | FS | LS | i as u32);
|
||||||
|
|
||||||
self.regs.tppoll.writef(1 << 6, true); //Notify of normal priority packet
|
self.regs.tppoll.writef(1 << 6, true); //Notify of normal priority packet
|
||||||
|
|
||||||
println!("Transmit {}: During: Control {:X}: Buffer {:X} TPPoll: {:X} ISR: {:X}", td_i, td.ctrl.read(), td.buffer.read(), self.regs.tppoll.read(), self.regs.isr.read());
|
|
||||||
|
|
||||||
while self.regs.tppoll.readf(1 << 6) {
|
while self.regs.tppoll.readf(1 << 6) {
|
||||||
unsafe { asm!("pause" : : : "memory" : "intel", "volatile"); }
|
unsafe { asm!("pause" : : : "memory" : "intel", "volatile"); }
|
||||||
}
|
}
|
||||||
|
|
||||||
println!("Transmit {}: After: Control {:X}: Buffer {:X} TPPoll: {:X} ISR: {:X}", td_i, td.ctrl.read(), td.buffer.read(), self.regs.tppoll.read(), self.regs.isr.read());
|
|
||||||
|
|
||||||
return Ok(i);
|
return Ok(i);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -166,7 +154,7 @@ impl SchemeMut for Rtl8168 {
|
||||||
}
|
}
|
||||||
|
|
||||||
impl Rtl8168 {
|
impl Rtl8168 {
|
||||||
pub unsafe fn new(base: usize, irq: u8) -> Result<Self> {
|
pub unsafe fn new(base: usize) -> Result<Self> {
|
||||||
assert_eq!(mem::size_of::<Regs>(), 256);
|
assert_eq!(mem::size_of::<Regs>(), 256);
|
||||||
|
|
||||||
let regs = &mut *(base as *mut Regs);
|
let regs = &mut *(base as *mut Regs);
|
||||||
|
@ -182,7 +170,6 @@ impl Rtl8168 {
|
||||||
|
|
||||||
let mut module = Rtl8168 {
|
let mut module = Rtl8168 {
|
||||||
regs: regs,
|
regs: regs,
|
||||||
irq: irq,
|
|
||||||
receive_buffer: [Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
|
receive_buffer: [Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
|
||||||
Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
|
Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
|
||||||
Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
|
Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?, Dma::zeroed()?,
|
||||||
|
@ -211,8 +198,6 @@ impl Rtl8168 {
|
||||||
}
|
}
|
||||||
|
|
||||||
pub unsafe fn init(&mut self) {
|
pub unsafe fn init(&mut self) {
|
||||||
println!(" + RTL8168 on: {:X}, IRQ: {}", self.regs as *mut Regs as usize, self.irq);
|
|
||||||
|
|
||||||
let mac_low = self.regs.mac[0].read();
|
let mac_low = self.regs.mac[0].read();
|
||||||
let mac_high = self.regs.mac[1].read();
|
let mac_high = self.regs.mac[1].read();
|
||||||
let mac = [mac_low as u8,
|
let mac = [mac_low as u8,
|
||||||
|
@ -221,7 +206,7 @@ impl Rtl8168 {
|
||||||
(mac_low >> 24) as u8,
|
(mac_low >> 24) as u8,
|
||||||
mac_high as u8,
|
mac_high as u8,
|
||||||
(mac_high >> 8) as u8];
|
(mac_high >> 8) as u8];
|
||||||
println!(" - MAC: {:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
|
print!("{}", format!(" - MAC: {:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]));
|
||||||
let _ = setcfg("mac", &format!("{:>02X}.{:>02X}.{:>02X}.{:>02X}.{:>02X}.{:>02X}", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]));
|
let _ = setcfg("mac", &format!("{:>02X}.{:>02X}.{:>02X}.{:>02X}.{:>02X}.{:>02X}", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]));
|
||||||
|
|
||||||
// Reset - this will disable tx and rx, reinitialize FIFOs, and set the system buffer pointer to the initial value
|
// Reset - this will disable tx and rx, reinitialize FIFOs, and set the system buffer pointer to the initial value
|
||||||
|
@ -294,18 +279,5 @@ impl Rtl8168 {
|
||||||
|
|
||||||
// Lock config
|
// Lock config
|
||||||
self.regs.cmd_9346.write(0);
|
self.regs.cmd_9346.write(0);
|
||||||
|
|
||||||
println!(" - Ready CMD {:X} ISR {:X} IMR {:X} PHYS {:X} RMS {:X} MTPS {:X} RCR {:X} TCR {:X} RDSAR {:X} TNPDS {:X} THPDS {:X}",
|
|
||||||
self.regs.cmd.read(),
|
|
||||||
self.regs.isr.read(),
|
|
||||||
self.regs.imr.read(),
|
|
||||||
self.regs.phys_sts.read(),
|
|
||||||
self.regs.rms.read(),
|
|
||||||
self.regs.mtps.read(),
|
|
||||||
self.regs.rcr.read(),
|
|
||||||
self.regs.tcr.read(),
|
|
||||||
self.regs.rdsar[0].read(),
|
|
||||||
self.regs.tnpds[0].read(),
|
|
||||||
self.regs.thpds[0].read());
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -28,6 +28,8 @@ fn main() {
|
||||||
let irq_str = args.next().expect("rtl8168d: no irq provided");
|
let irq_str = args.next().expect("rtl8168d: no irq provided");
|
||||||
let irq = irq_str.parse::<u8>().expect("rtl8168d: failed to parse irq");
|
let irq = irq_str.parse::<u8>().expect("rtl8168d: failed to parse irq");
|
||||||
|
|
||||||
|
print!("{}", format!(" + RTL8168 on: {:X}, IRQ: {}", bar, irq));
|
||||||
|
|
||||||
thread::spawn(move || {
|
thread::spawn(move || {
|
||||||
unsafe {
|
unsafe {
|
||||||
syscall::iopl(3).expect("rtl8168d: failed to get I/O permission");
|
syscall::iopl(3).expect("rtl8168d: failed to get I/O permission");
|
||||||
|
@ -41,7 +43,7 @@ fn main() {
|
||||||
|
|
||||||
let address = unsafe { syscall::physmap(bar, 256, MAP_WRITE).expect("rtl8168d: failed to map address") };
|
let address = unsafe { syscall::physmap(bar, 256, MAP_WRITE).expect("rtl8168d: failed to map address") };
|
||||||
{
|
{
|
||||||
let device = Arc::new(RefCell::new(unsafe { device::Rtl8168::new(address, irq).expect("rtl8168d: failed to allocate device") }));
|
let device = Arc::new(RefCell::new(unsafe { device::Rtl8168::new(address).expect("rtl8168d: failed to allocate device") }));
|
||||||
|
|
||||||
let mut event_queue = EventQueue::<usize>::new().expect("rtl8168d: failed to create event queue");
|
let mut event_queue = EventQueue::<usize>::new().expect("rtl8168d: failed to create event queue");
|
||||||
|
|
||||||
|
@ -56,8 +58,6 @@ fn main() {
|
||||||
|
|
||||||
let isr = unsafe { device_irq.borrow_mut().irq() };
|
let isr = unsafe { device_irq.borrow_mut().irq() };
|
||||||
if isr != 0 {
|
if isr != 0 {
|
||||||
println!("RTL8168 ISR {:X}", isr);
|
|
||||||
|
|
||||||
irq_file.write(&mut irq)?;
|
irq_file.write(&mut irq)?;
|
||||||
|
|
||||||
let mut todo = todo_irq.borrow_mut();
|
let mut todo = todo_irq.borrow_mut();
|
||||||
|
|
|
@ -1,6 +1,3 @@
|
||||||
vesad T T T G
|
|
||||||
stdio display:1
|
|
||||||
ps2d
|
|
||||||
initfs:bin/pcid /etc/pcid.toml
|
initfs:bin/pcid /etc/pcid.toml
|
||||||
ethernetd
|
ethernetd
|
||||||
#arpd
|
#arpd
|
||||||
|
|
|
@ -1,3 +1,6 @@
|
||||||
|
initfs:bin/vesad T T T G
|
||||||
|
stdio display:1
|
||||||
|
initfs:bin/ps2d
|
||||||
initfs:bin/pcid initfs:etc/pcid.toml
|
initfs:bin/pcid initfs:etc/pcid.toml
|
||||||
initfs:bin/redoxfs disk:0
|
initfs:bin/redoxfs disk:0
|
||||||
cd file:
|
cd file:
|
||||||
|
|
Loading…
Reference in a new issue