39 lines
1.2 KiB
Makefile
39 lines
1.2 KiB
Makefile
# Based on https://make.mad-scientist.net/papers/multi-architecture-builds/
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.SUFFIXES:
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OBJDIR := _out_$(RUST_TARGET)-$(_link_type)-$(_profile)
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# Define the rules to build in the target subdirectories.
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#
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MAKETARGET = $(MAKE) --no-print-directory -C $@ -f $(CURDIR)/Makefile \
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SRCDIR=$(CURDIR) $(MAKECMDGOALS)
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.PHONY: $(OBJDIR)
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$(OBJDIR):
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+@[ -d "$@" ] || mkdir -p "$@"
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+@$(MAKETARGET)
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# These rules keep make from trying to use the match-anything rule below to
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# rebuild the makefiles--ouch! Obviously, if you don't follow my convention
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# of using a `.mk' suffix on all non-standard makefiles you'll need to change
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# the pattern rule.
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#
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Makefile : ;
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%.mk :: ;
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# Anything we don't know how to build will use this rule. The command is a
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# do-nothing command, but the prerequisites ensure that the appropriate
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# recursive invocations of make will occur.
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#
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% :: $(OBJDIR) ;
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# The clean rule is best handled from the source directory: since we're
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# rigorous about keeping the target directories containing only target files
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# and the source directory containing only source files, `clean' is as trivial
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# as removing the target directories!
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#
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.PHONY: clean
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clean:
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rm -rf $(OBJDIR)
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